DS1307 Alarm Digital Clock Circuit Diagram The circuit diagram for the digital clock. 2x16 LCD is connected to the port 2 of AT89C51. P1.0 of uC will provide the SCL (serial clock) and P1.1 SDA (serial data) for I2C communication.
There are four switches connected to the uC, as shown in the figure. Function of the keys are same as clear from their names.
When the power supply is switched on it will give you the default date and time, but later you can change it to the desired value. After setting once, the backup battery will keep the clock ticking even after the power is not there.
A little about I2C:
There are basically four main conditions in I2C protocol.
1) Start Condition
2)Stop Condition
3)Data Validity
4)Acknowledgement
1)Start Condition:
when SCL is high and SDA H->L, will be taken as start condition for the communication.
2)Stop Condition:
when SCL is high and SDA L->H, will generate a stop condition.
3)Data Validity:
When SCL is high there should be no chande in SDA line only then the data is valid, the data change should be made only when SCL is low.
4)Acknowledgement:
After sending of one byte of data the reciever has to acknowledge the sender for the successful reception. for this the sender make the SDA line high and reciever pulls down the SDA low, which tells the sender that data has reached safely.
Designer Contact : ajay_bhargav@hotmail.com
There are four switches connected to the uC, as shown in the figure. Function of the keys are same as clear from their names.
When the power supply is switched on it will give you the default date and time, but later you can change it to the desired value. After setting once, the backup battery will keep the clock ticking even after the power is not there.
A little about I2C:
There are basically four main conditions in I2C protocol.
1) Start Condition
2)Stop Condition
3)Data Validity
4)Acknowledgement
1)Start Condition:
when SCL is high and SDA H->L, will be taken as start condition for the communication.
2)Stop Condition:
when SCL is high and SDA L->H, will generate a stop condition.
3)Data Validity:
When SCL is high there should be no chande in SDA line only then the data is valid, the data change should be made only when SCL is low.
4)Acknowledgement:
After sending of one byte of data the reciever has to acknowledge the sender for the successful reception. for this the sender make the SDA line high and reciever pulls down the SDA low, which tells the sender that data has reached safely.
Designer Contact : ajay_bhargav@hotmail.com
Source: www.kmitl.ac.th
